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  4-141 fast and ls ttl data 4-stage synchronous bidirectional counters the mc54/74f168 and mc54/74f169 are fully synchronous 4-stage up/ down counters. the f168 is a bcd decade counter; the f169 is a modulo-16 binary counter . both feature a preset capability for programmable operation, carry lookahead for easy cascading, and a u/d input to control the direction of counting. all state changes, whether in counting or parallel loading, are initi - ated by the low-to-high transition of the clock. ? asynchronous counting and loading ? built-in lookahead carry capability ? presettable for programmable operation connection diagram (top view)            
                         mode select table pe cep cet u/d action on rising clock edge l x x x load (p n o q n ) h l l h count up (increment) h l l l count down (decrement) h h x x no change (hold) h x h x no change (hold) h = high v oltage level; l = low v oltage level; x = don't care          
    mc54/74f168         mc54/74f169          
state diagrams mc54/74f168 mc54/74f169 4-stage synchronous bidirectional counters fast ? schottky ttl j suffix ceramic case 620-09 n suffix plastic case 648-08 16 1 16 1 ordering information mc54fxxxj ceramic mc74fxxxn plastic mc74fxxxd soic 16 1 d suffix soic case 751b-03 logic symbol                            
          
4-142 fast and ls ttl data mc54/74f168 ? mc54/74f169 note: these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. mc54/74f168 mc54/74f169 
   
   
  
  
      
          
  
  
                 
   
   
  
  
      
          
  
  
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4-143 fast and ls ttl data mc54/74f168 ? mc54/74f169 functional description the f168 and f169 use edge-triggered j-k type flip-flops and have no constraints on changing the control or data input signals in either state of the clock. the only requirement is that the various inputs attain the desired state at least a setup time before the rising edge of the clock and remain valid for the rec - ommended hold time thereafter . the parallel load operation takes precedence over other operations, as indicated in the mode select t able. when pe is low , the data on the p 0 -p 3 inputs enters the flip-flops on the next rising edge of the clock. in order for counting to occur , both cep and cet must be low and pe must be high; the u/d input then determines the direction of counting. the terminal count (tc ) output is normally high and goes low , provided that cet is low , when a counter reaches zero in the count down mode or reaches 9 (15 for the f169) in the count up mode. the tc output state is not a function of the count enable parallel (cep ) input level. the tc output of the f168 decade counter can also be low in the illegal states 1 1, 13, and 15, which can occur when power is turned on or via parallel loading. if an ille - gal state occurs, the f168 will return to the legitimate se - quence within two counts. since the tc signal is derived by decoding the flip-flop states, there exists the possibility of de - coding spikes on tc . for this reason the use of tc as a clock signal is not recommended (see logic equations below). 1) count enable = cep ? cet ? pe 2) up: ( f168): tc = q 0 ? q 1 ? q 2 ? q 3 ? (up) ? cet ( f169): tc = q 0 ? q 1 ? q 2 ? q 3 ? (up) ? cet 3) down: tc = q 0 ? q 1 ? q 2 ? q 3 ? (down) ? cet guaranteed operating ranges symbol parameter min typ max unit v cc supply voltage 54, 74 4.5 5.0 5.5 v t a operating ambient temperature range 54 55 25 125 c t a operating ambient temperature range 74 0 25 70 i oh output current e high 54, 74 1.0 ma i ol output current e low 54, 74 20 ma dc characteristics over operating temperature range (unless otherwise specified) limits symbol parameter min typ max unit test conditions v ih input high voltage 2.0 v guaranteed input high voltage for all inputs v il input low voltage 0.8 v guaranteed input low voltage for all inputs v ik input clamp diode voltage 1.2 v v cc = min, i in = 18 ma v oh output high voltage 54, 74 2.5 3.4 v i oh = 1.0 ma v cc = 4.50 v 74 2.7 3.4 v i oh = 1.0 ma v cc = 4.75 v v ol output low voltage 0.35 0.5 v i ol = 20 ma v cc = min i ih input high current 20 m a v cc = max, v in = 2.7 v 0.1 ma v cc = max, v in = 7.0 v i il input low current cet other inputs 1.2 0.6 ma v cc = max, v in = 0.5 v i os output short circuit current (note 2) 60 150 ma v cc = max, v out = 0 v i cc power supply current 52 ma v cc = max notes: 1. for conditions shown as min or max, use the appropriate value specified under recommended operating conditions for the applicable device type. 2. not more than one output should be shorted at a time, nor for more than 1 second.
4-144 fast and ls ttl data mc54/74f168 ? mc54/74f169 ac characteristics 54/74f 54f 74f t a = +25 c t a = 55 c to +125 c t a = 0 c to 70 c v cc = +5.0 v v cc = 5.0 v 10% v cc = 5.0 v 10% c l = 50 pf c l = 50 pf c l = 50 pf symbol parameter min max min max min max unit f max maximum clock frequency 100 60 85 mhz t plh t phl propagation delay cp to q n (pe high or low) 3.0 4.0 8.5 11.5 3.0 4.0 10.5 14 3.0 4.0 9.5 13 ns t plh t phl propagation delay cp to tc (f168) 5.5 4.0 15.5 11 5.5 4.0 18 13.5 5.5 4.0 17 12.5 ns t plh t phl propagation delay cp to tc (f169) 5.0 4.0 15.5 11 5.0 4.0 18 13.5 5.0 4.0 17 12.5 ns t plh t phl propagation delay cet to tc 2.5 2.5 6.0 8.0 2.5 2.5 8.0 10 2.5 2.5 7.0 9.0 ns t plh t phl propagation delay u/d to tc (f168) 3.5 4.0 11 16 3.5 4.0 13.5 18.5 3.5 4.0 12.5 17.5 ns t plh t phl propagation delay u/d to tc (f169) 3.5 4.0 11 10.5 3.5 4.0 13.5 13 3.5 4.0 12.5 12 ns ac operating requirements 54/74f 54f 74f t a = +25 c t a = 55 c to +125 c t a = 0 c to 70 c v cc = +5.0 v v cc = 5.0 v 10% v cc = 5.0 v 10% symbol parameter min max min max min max unit t s (h) t s (l) setup time, high or low p n to cp 4.0 4.0 5.5 5.5 4.5 4.5 ns t h (h) t h (l) hold time, high or low p n to cp 3.0 3.0 3.5 3.5 3.5 3.5 ns t s (h) t s (l) setup time, high or low cep or cet to cp 5.0 5.0 7.0 7.0 6.0 6.0 ns t h (h) t h (l) hold time high or low cep or cet to cp 0 0 0 0 0 0 ns t s (h) t s (l) setup time, high or low pe to cp 8.0 8.0 10 10 9.0 9.0 ns t h (h) t h (l) hold time, high or low pe to cp 0 0 0 0 0 0 ns t s (h) t s (l) setup time, high or low (f168) u/d to cp 11 16.5 13.5 19 12.5 18 ns t s (h) t s (l) setup time, high or low (f169) u/d to cp 11 7.0 13.5 9.0 12.5 8.0 ns t h (h) t h (l) hold time, high or low u/d to cp 0 0 0 0 0 0 ns t w (h) t w (l) cp pulse width high or low 5.0 5.0 8.0 8.0 5.5 5.5 ns
4-145 fast and ls ttl data                   
     
 

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4-146 fast and ls ttl data motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability , including without limitation consequential or incidental damages. at ypicalo parameters can and do vary in dif ferent applications. all operating parameters, including at ypicalso must be validated for each customer application by customer ' s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur . should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/af firmative action employer . literature distribution centers: usa: motorola literature distribution; p .o. box 20912; phoenix, arizona 85036. europe: motorola ltd.; european literature centre; 88 t anners drive, blakelands, milton keynes, mk14 5bp , england. jap an: nippon motorola ltd.; 4-32-1, nishi-gotanda, shinagawa-ku, t okyo 141, japan. asia p acific: motorola semiconductors h.k. ltd.; silicon harbour center , no. 2 dai king street, t ai po industrial estate, t ai po, n.t., hong kong. ?


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